The Semiconductor Thermal Constraint

Abstract

In October 2025, Stanford University and the University of Houston independently published separate breakthroughs in thermal materials for semiconductors. Both discoveries address the escalating thermal constraints inside AI chips. This memo maps the implications of these two discoveries in combination to analyze what they compete for, what they complement, and what their synthesis signals regarding the physical trajectory of AI compute logic scaling over the next decade.

Part I. Two Breakthroughs. Two Different Games.

What Stanford Found

Stanford's research group grew polycrystalline diamond as a heat-spreading coating directly onto semiconductor devices at 400 degrees Celsius - low enough that existing chip structures survive. Diamond's thermal conductivity sits between 2,200 and 2,400 watts per meter per kelvin. The material is electrically insulating. This combination - thermally excellent, electrically harmless - makes it what the researchers called a “thermal dielectric”: something that can replace the chip's existing insulating layers, which currently conduct heat at approximately 1.4 watts per meter per kelvin.

Silicon dioxide - the standard insulating material separating transistor layers - is thermally nearly inert. It traps heat. Diamond conducting at 2,200 watts per meter per kelvin inserted into those same layers is a 1,500x improvement in thermal conductivity at the location where it matters most: between the transistor and everything above it.

The critical word in Stanford's contribution is insulating. Diamond does not conduct electricity. That is why it can go inside a chip without interfering with the chip's function. That is also why diamond is specifically a solution to the insulator-layer thermal bottleneck - not the semiconductor layer.

What Houston Found

One month later, researchers at the University of Houston published results in Materials Today showing that high-quality boron arsenide crystals conduct heat at more than 2,100 watts per meter per kelvin at room temperature - matching or exceeding diamond. This overturned revised theoretical models from 2017 that had capped boron arsenide at 1,360 watts per meter per kelvin and caused most researchers to dismiss its potential for nearly a decade.

The thermal conductivity number alone makes this interesting. What makes it important is everything else boron arsenide does simultaneously.

Boron arsenide is not an insulator. It is a semiconductor. It has a wider bandgap than silicon. It has substantially higher carrier mobility than silicon in both electrons and holes. Its coefficient of thermal expansion is well-matched to existing chip architectures, which matters for integration compatibility. It is easier and less expensive to manufacture than diamond. And it conducts heat at 2,100+ watts per meter per kelvin.

The University of Houston team's lead researcher described it with unusual directness: “It has the best properties of a good semiconductor and a good thermal conductor - all sorts of good properties in one material. That has never happened in other semiconducting materials.”

That sentence is worth reading twice. Silicon, the material on which essentially all modern computing is built, conducts heat at roughly 150 watts per meter per kelvin. Gallium nitride, used in high-power RF devices, conducts at approximately 130. These materials are excellent electrically and poor thermally. The thermal management problem in chips exists precisely because the best available semiconductors are poor heat conductors.

Boron arsenide is both. At the same time. In the same crystal.

The Critical Distinction

This is where the industry analysis has gone wrong by treating these as competing solutions to the same problem. They are not.

• Diamond solves the insulator problem - replacing thermally dead SiO2 layers with thermally active diamond. It cannot solve the semiconductor problem because it is not a semiconductor in practical chip applications.
• Boron arsenide solves the semiconductor problem - replacing thermally poor silicon or gallium nitride substrates with a material that conducts heat while also conducting electrons and holes. It may not solve the insulator problem in the same way because it is electrically active, not insulating.

These materials target different layers of the chip stack. They address different thermal bottlenecks. They are not in competition. They are potentially the two materials that, together, solve chip thermal management from both directions simultaneously.

Nobody is writing about this. That is the observation this memo is built on.

Part II. The Interface Problem Is The Real Story

Why Thermal Boundary Resistance Matters More Than Bulk Conductivity

Both materials have extraordinary bulk thermal conductivity. Both face the same fundamental challenge at a different scale: thermal boundary resistance - the tendency of heat-carrying phonons to pile up at the boundary between two materials because their crystal lattices vibrate at different frequencies.

A material's bulk thermal conductivity tells you how fast heat moves through it. Thermal boundary resistance tells you how much heat can cross from one material into it. If the boundary resistance is high enough, even the most thermally conductive material becomes nearly useless because heat cannot enter it efficiently from the material it is supposed to cool.

This was Stanford's core obstacle before their accidental discovery. Growing diamond on gallium nitride capped with silicon nitride produced silicon carbide spontaneously at the interface - acting as a phonon bridge that matched the acoustic properties of both sides. The thermal boundary resistance dropped dramatically. The cooling performance became practically useful.

The BAs Interface Advantage That Has Not Been Highlighted

Research published in ACS journals in early 2025 from a collaboration between Chinese and American researchers found something that has received almost no coverage in mainstream technology analysis: phonon band structure engineering in the gallium nitride / boron arsenide interface produced thermal boundary resistance more than eight times lower than the equivalent gallium nitride / diamond interface.

Eight times lower. On the same gallium nitride substrate that Stanford's diamond work targets.

This result matters in a specific, practical way. The diamond thermal management story rests significantly on the accidental discovery of the silicon carbide interlayer reducing boundary resistance at the diamond / gallium nitride junction. That discovery was a fortunate chemical accident. The researchers themselves noted it was not predicted by their models.

The boron arsenide interface advantage, by contrast, emerges from the physics of the material itself. Boron arsenide's Debye temperature - a measure of how its crystal lattice vibrates - is more naturally compatible with gallium nitride than diamond's is. The phonons match better without requiring an accidental bridging layer.

This does not mean diamond's approach fails. The silicon carbide interlayer discovery is real and reproducible. It means that boron arsenide may have a structural interface advantage over diamond specifically in applications involving gallium nitride - the material used in every 5G base station, every defense radar system, and every high-power RF amplifier. Stanford demonstrated its results on gallium nitride. The most commercially advanced near-term applications of thermal materials are on gallium nitride. And boron arsenide interfaces with gallium nitride eight times more efficiently than diamond does.

That is not a marginal difference.

The Crystal Uniformity Problem Both Materials Share

Here is the honest constraint that the coverage of both breakthroughs tends to underweight.

Both diamond and boron arsenide face the same fundamental manufacturing challenge: crystal uniformity at scale. The thermal properties that make these materials exceptional depend on crystal quality. A diamond or boron arsenide crystal with defects, impurities, or non-uniform grain structure conducts heat significantly worse than the exceptional values reported in research settings. In some cases dramatically worse.

KAIST and Arizona State researchers published in April 2025 that isotope-enriched boron arsenide achieved 1,500 watts per meter per kelvin - the highest isotope-enriched value reported for the material - but explicitly noted that the observed phonon lifetimes remain shorter than expected for the material's bandgap structure, suggesting crystal quality still has room for improvement and that even higher conductivities are theoretically achievable with purer crystals.

Stanford's polycrystalline diamond faces the same issue. Polycrystalline diamond conducts heat less effectively than single crystal diamond because grain boundaries scatter phonons. The 400-degree growth process produces large-grained polycrystalline diamond that approaches single-crystal performance - but approaches is not equals.

Both materials are at the frontier of what crystal growth science can currently achieve. Both will improve as synthesis methods improve. The question for any organization making decisions based on these materials is not which one performs better in the best laboratory samples. It is which one will reach manufacturable uniformity at commercial scale first and at what cost.

Diamond has the head start. Stanford is already working with TSMC, Samsung, and Applied Materials. The manufacturing integration partnerships are established and active. Boron arsenide is still primarily in crystal growth research. High-purity crystals remain small and inconsistent enough that the University of Houston team's results are contested by theory precisely because getting consistently high crystal quality is still an unsolved problem.

The race is not decided. But the starting positions are not equal.

Part III. What The Industry Numbers Actually Say

The $7 Trillion Problem

McKinsey projects that meeting global compute requirements through 2030 may require approximately $7 trillion in data center infrastructure investment. As of 2026, US data centers consume approximately 4 percent of national electricity, on a trajectory to reach 6 to 12 percent by 2030. Modern AI server racks require 100 to 140 kilowatts, making liquid cooling mandatory. Traditional air-cooled facilities cannot physically support GPU-dense AI deployments.

Liquid cooling capacity equaled air cooling capacity in 2025. By the end of 2026, it is projected to double air cooling capacity. Vertiv, the dominant thermal management infrastructure company, carries a $9.5 billion backlog and record order growth across cooling products. Microsoft, Google, Amazon, and Meta collectively spent more than $380 billion on AI infrastructure in 2025. Nuclear power agreements are being fast-tracked specifically for AI data centers.

This is the landscape that diamond and boron arsenide are entering. An industry spending at war-level pace to manage a problem that external cooling can partially address but cannot fundamentally solve because the heat source is inside chips that keep getting denser.

The Distinction That Changes The Math

Every cooling technology currently being deployed at scale - liquid cooling, immersion cooling, direct liquid cooling, microfluidic channels inside package - is external to the transistor. It manages heat after it has already accumulated and disrupted chip performance. The cooling infrastructure controls what happens outside the chip. The physics inside the chip remains unchanged.

Diamond and boron arsenide thermal management operates inside the chip, within nanometers of where heat is generated. The difference in approach is not incremental. It changes the nature of the problem.

External cooling manages the thermal waste product. Internal thermal materials reduce the thermal waste in the first place by moving heat laterally before it can build into hot spots that force throttling. A chip with effective internal thermal management and external liquid cooling outperforms a chip with only external liquid cooling - not because the cooling system is better, but because the chip arrives at the cooling system with less heat concentrated in damaging patterns.

The industry's $7 trillion infrastructure buildout does not make diamond and boron arsenide redundant. It makes them more valuable. Every dollar spent on liquid cooling infrastructure amplifies the value of internal thermal materials that make the chips those systems are cooling work more efficiently.

These technologies are not competing. They are sequential. And the market is treating them as separate stories when they are chapters in the same one.

Part IV. The Three Hidden Bets

Hidden Bet One: Diamond Wins The Insulator Layer. BAs Wins The Substrate.

The chip stack has two distinct thermal bottleneck locations.

The first is the dielectric and insulating layers above the transistors - the silicon dioxide that separates metal interconnects. These layers are electrically non-conductive by design. Diamond, also electrically non-conductive, can replace or supplement them without disrupting electrical function. This is Stanford's target. The thermal dielectric concept - replacing thermally inert insulators with thermally active diamond - is the play.

The second bottleneck is the semiconductor substrate itself. Silicon at 150 watts per meter per kelvin, gallium nitride at 130, gallium oxide at even lower values - these are the materials transistors are built on, and their poor thermal conductivity is structural to the problem. Replacing or supplementing these with a material that conducts heat while remaining an effective semiconductor requires a material that is both. Diamond cannot play this role in standard chip architectures because it is not a practical semiconductor at the density required. Boron arsenide can.

If both materials reach manufacturing viability, the optimized chip architecture of the mid-2030s may incorporate both: diamond in the insulating layers above transistors, boron arsenide as the semiconductor substrate below them. Two different materials. Two different layers. Both addressing thermal bottlenecks that current architectures have no solution for.

This is not a prediction. It is an observation about what the physics permits if the manufacturing challenges are solved.

Hidden Bet Two: The Defense Sector Tells You The Timeline

DARPA is funding Stanford's diamond integration through the Threads program, targeting six to eight times the power density of current X-band power amplifiers using gallium nitride devices with diamond cooling. DARPA's historical funding pattern provides a reliable, if rough, timeline signal: programs funded today typically reach defense-grade deployment in seven to ten years and commercial deployment in ten to fifteen.

The defense sector is also where boron arsenide's strongest near-term application case sits. Gallium nitride power amplifiers for radar, communications, and electronic warfare are exactly the high-power-density, thermally constrained devices that both materials target. Defense procurement tolerates higher cost and lower volume than commercial semiconductor manufacturing - making it the natural proving ground for materials before they are ready for mass production.

The fact that DARPA is funding diamond specifically for gallium nitride applications - the same application where research shows boron arsenide has an eight-times better interface characteristic than diamond - suggests that either the defense funding community has not yet incorporated the boron arsenide interface findings, or that diamond's manufacturing head start makes it the practical choice regardless of the physics advantage.

Either way, the defense sector deployment will be the real-world test that determines which material's manufacturing challenges prove more tractable. That test will run over the next five to seven years, and its results will do more to determine the commercial semiconductor trajectory than any laboratory measurement.

Hidden Bet Three: The Theory Broke Twice. It Will Break Again.

Boron arsenide's thermal conductivity was predicted at above 2,000 watts per meter per kelvin in 2013. Revised theory in 2017, incorporating more complex phonon scattering models, capped it at 1,360. The University of Houston's 2025 experimental results show it exceeding 2,100, forcing theory revision again.

This is a pattern worth noting. The theoretical models of phonon transport in novel crystal structures have been wrong twice about boron arsenide in twelve years. The KAIST research notes that observed phonon lifetimes are shorter than expected even in their highest-quality crystals, suggesting that the current theoretical framework is still missing something.

In materials science, when experimental results consistently diverge from theory in a favorable direction, it typically indicates that the material has properties that the current framework does not fully capture. The history of semiconductor materials is full of examples where a material's behavior in high-quality samples exceeded what theory predicted, and where the theory eventually caught up to reveal the mechanism.

Isotopically enriched boron arsenide at 1,500 watts per meter per kelvin and apparently room to improve further. Theoretical models that have underestimated the material twice. An interface characteristic with gallium nitride that is eight times better than diamond without requiring the accidental chemistry that diamond depends on.

The conservative reading is that boron arsenide will reach manufacturing viability more slowly than diamond because diamond has the head start. The aggressive reading is that boron arsenide's physics are better in the specific applications that matter most for AI hardware, and that the manufacturing challenges will be solved because the incentive to solve them is enormous and growing.

The honest reading is that both are probably partially right, and that the decade-level outcome depends on which manufacturing challenge proves more tractable - diamond's flatness and CMOS integration, or boron arsenide's crystal uniformity and scaling.

Part V. What This Means For AI Infrastructure

The Compute Utilization Gap

Modern AI server racks require 100 to 140 kilowatts. They are not delivering 100 to 140 kilowatts of effective compute to workloads. The gap between rated power consumption and effective compute output is thermal throttling - chips reducing their operating frequency to stay within temperature limits. This gap is not disclosed by chip manufacturers in standard specifications and is rarely modeled explicitly in infrastructure investment analyses.

The gap is real. It is material. It compounds at scale. A 10 to 20 percent reduction in effective compute utilization across a large training cluster, relative to rated specifications, represents a substantial fraction of the infrastructure investment producing less than its rated output.

Both diamond and boron arsenide thermal management, if successfully integrated, reduce this gap by managing heat at the source rather than after accumulation. The economic value of closing the utilization gap at hyperscaler scale is substantial - and it is additive to the performance benefits of the materials themselves.

The Edge AI Case The Datacenter Narrative Obscures

Industrial AI deployment - systems monitoring production lines, drilling operations, energy infrastructure, manufacturing processes - runs in environments that data center thermal analysis does not model. Sealed enclosures. Elevated ambient temperatures. No liquid cooling infrastructure. Limited physical space. Chips that throttle significantly below rated performance because the thermal environment is hostile and there is no practical cooling system to help them.

This is not a niche application. It is where AI moves from laboratory demonstration to industrial deployment. The gap between what AI can do in a data center and what AI can do at the industrial edge is substantially a thermal gap - not a compute gap, not a model quality gap, but a gap in what chips can actually deliver when cooling infrastructure is unavailable.

Diamond and boron arsenide thermal management inside the chip - reducing the chip's dependence on external cooling - matters more for edge deployment than for data centers. Data centers have options. The industrial edge does not. A chip that stays within thermal limits without aggressive throttling in a sealed enclosure at elevated ambient temperature is a fundamentally different product than what exists today.

The data center gets the coverage. The edge gets the operational impact. The analysis that misses the edge case is missing the larger commercial opportunity.

The Positioning Window

Both materials are in the late research / early manufacturing validation phase. Neither is commercially deployed in AI chips. The window between now and first commercial deployment - estimated in the early-to-mid 2030s for diamond in advanced chips, potentially later for boron arsenide given its earlier manufacturing readiness - is the window in which organizations can build the knowledge, the supplier relationships, and the system architecture decisions that determine whether they are early beneficiaries of the transition or late adopters.

The organizations with the deepest integration into Stanford's research program - TSMC, Samsung, Applied Materials, Micron - are in this window deliberately. DARPA's funding of diamond-GaN integration is a positioning decision, not just a research decision.

For organizations building AI infrastructure or AI applications that depend on AI infrastructure, the practical question is: which architectural decisions being made today are assuming thermal constraints as permanent features, and which ones leave room to take advantage of thermal management improvements when they arrive?

Conclusion. The Observation, Plainly Stated

The thermal management story in semiconductors is not a single breakthrough. It is a race between at least two materials, targeting at least two different bottleneck layers, with different physics advantages, different manufacturing timelines, and potentially complementary roles in the same optimized architecture.

The industry is covering them as separate stories. They are not separate.

Diamond wins if its manufacturing advantages and existing partnership ecosystem overcome boron arsenide's physics advantages at the interfaces that matter most for current AI hardware architectures.

Boron arsenide wins if its semiconductor + thermal conductor combination proves manufacturable at scale, because it offers something diamond cannot: replacing the semiconductor substrate layer itself with a material that is simultaneously an excellent conductor of both heat and charge.

Both win if the chip architectures of the mid-2030s incorporate diamond in the insulating layers and boron arsenide in the semiconductor layers - addressing both thermal bottlenecks simultaneously in the same device stack.

The external cooling infrastructure buildout - $7 trillion, liquid cooling, immersion systems - does not make either material less relevant. It makes both more valuable, because internal thermal management and external cooling are sequential, not competing.

And the utilization gap - the silent tax on AI compute that thermal throttling imposes at scale - is money already being spent and compute already being lost, every day, in every large cluster running today.

The material race will determine who captures the value of closing that gap.

Appendix. Key Data Parameters

• GaN/BAs interface thermal boundary resistance: More than 8x lower than equivalent GaN/diamond interface (2025 research, ACS).
• Stanford result: 70°C temperature reduction in GaN HEMT, 5x RF amplification improvement, temperature reduced to one tenth in 3D stack simulation.
• Houston result: BAs thermal conductivity exceeds 2,100 W/mK, overturning 2017 revised theory that capped it at 1,360 W/mK.
• Industry scale: US data centers at 4% of national electricity in 2026, projected 6–12% by 2030. Modern AI racks at 100–140 kW, requiring mandatory liquid cooling. $7 trillion estimated infrastructure requirement through 2030.
• The gap both materials target: The difference between rated chip compute and actual delivered compute due to thermal throttling - real, material, and unquantified in standard infrastructure analyses.

Siddharth Shah

Founder & CEO, SVECTOR